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    • About Edwin Gray
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    • RDC Theory
    • Equations & Derivations
    • Prototype Builds
    • RDC Applications
  • Home
  • About Edwin Gray
  • Youtube Links
  • RDC Theory
  • Equations & Derivations
  • Prototype Builds
  • RDC Applications

Harnessing Displacement Current: From Conversion Tube to Solid-State

Edwin Gray's conversion tube harnessed displacement current via HV pulses (3kV, >500 V/ns rise, 3ns width) across tungsten rods and copper meshes, converting conduction current to dominant "cold" RDC for 2-6x efficient DC load powering with energy recovery.

Modern solid-state tech (SiC/GaN transistors) enables similar harnessing without tubes: Pulse HV capacitors through fast switches, inducing RDC in dielectrics (e.g., ceramics/PCBs), achieving precise control, lower losses, and higher efficiency for loads/recovery.

RDC circuit with conversion tube

 

Materials

  • Batterie: 12V xah.
  • Booster: High voltage DC-DC module.
  • Capacitor: 0.1μF 3kV+ rated.
  • Recovery diode: Wolfspeed C4D20120D.
  • Buck converter: LM2596 (for recovery to 3.6V-4.2V).
  • Supercapacitors: Eaton 2 x 2.7V 10F in series (~5.4V).
  • Microcontroller: UPduino v3.1.
  • Glass tube: Borosilicate, 10-15cm long, 3-4 inches (7.6-10cm) dia, epoxy sealed.
  • Electrodes: 2 tungsten rods, copper meshes.
  • Resistor: 100Ω for low anode.
  • Wires: HV silicone for high voltage, standard for others.
  • Load: 775 motor or 12V 35W bulb.
  • Tools: Multimeter, oscilloscope, soldering iron, epoxy.

Safety

Handle HV (3kV+); insulate; ventilate; disconnect batteries during wiring; wear glasses.

Tube Assembly

Drill ends for tungsten rods (5cm apart); insert copper meshes as grids (1-2cm spaced); seal with epoxy; wire high anode to cap -, low anode to pulse, grids to load +.

Wiring

  1. Parallel batteries (+ to +, - to -) for 3.6V supply.
  2. Battery + to booster input +; battery - to input -.
  3. Adjust booster to 3kV output.
  4. Booster output + to 0.1μF cap +.
  5. Cap - to tube high anode.
  6. Tube low anode to UPduino pin 25 via 100Ω resistor.
  7. Tube grids to load +.
  8. Load - to C4D20120D anodes (pins 1,3 parallel).
  9. C4D20120D cathode (pin 2) to supercaps +.
  10. Supercaps - to ground.
  11. Supercaps + to LM2596 input +; adjust output to 3.6V-4.2V.
  12. Buck output + to batteries +; buck - to -.
  13. Common all grounds.
  14. Power UPduino from batteries (3.3V-5V header).

Verilog Code

verilog

module pulse_gen (
   input clk,      // 12MHz clock on UPduino
   output reg pulse = 0
);
   reg [19:0] counter = 0;  // For ~100Hz (12e6 / 120000 = 100Hz)
   always @(posedge clk) begin
       counter <= counter + 1;
       if (counter == 119999) begin  // Reset at 100Hz
           pulse <= 1;
           counter <= 0;
       end else if (counter == 1) begin  // ~83ns pulse (1 clock cycle)
           pulse <= 0;
       end
   end
endmodule

Adjust for exact 3ns if needed; FPGA clock limits min pulse to ~83ns, but effective for dV/dt.

Uploading Code to UPduino

  1. Install OSS CAD Suite.
  2. Write/save Verilog as pulse_gen.v.
  3. Compile: yosys -p 'read_verilog pulse_gen.v; synth_ice40 -top pulse_gen -json pulse.json' then nextpnr-ice40 --up5k --package sg48 --json pulse.json --pcf upduino.pcf --asc pulse.asc (use UPduino pin constraints file upduino.pcf with pin 25 for pulse).
  4. Generate bitstream: icepack pulse.asc pulse.bin.
  5. Install Zadig: Set UPduino to libusbK driver.
  6. If issues, use FT_PROG to erase EEPROM.
  7. Upload: iceprog pulse.bin.

Testing

Power on; check 3kV at cap; scope pin 25 for pulses; run load; monitor runtime 35-71 min; thermal <60°C; submerged bulb test.

Troubleshooting

No spark: Check booster voltage, pulse width. Slow charge: Adjust code to 1Hz (counter to 12e6-1). Arcing: Insulate HV. Cap failure: Replace if overvolt. UPduino: Reinstall driver, recompile.

RDC circuit using solid state components

 

Materials

  • Batteries: 2 x 3.6V Li-ion 700mAh (parallel).
  • HV Booster: DC-DC module (3.6V in, 3kV out, e.g., ZVS flyback driver).
  • Capacitor: 0.1μF 3kV+.
  • Switch: Wolfspeed C3M0021120K SiC MOSFET (1200V).
  • Driver: Isolated gate driver (e.g., Si8271).
  • Dielectric Coupler: Ceramic capacitors (0.1μF 3kV) or PCB air-gap for grids.
  • Recovery Diode: Wolfspee

 

Materials

  • Batteries: 2 x 3.6V Li-ion 700mAh (parallel).
  • HV Booster: DC-DC module (3.6V in, 3kV out, e.g., ZVS flyback driver).
  • Capacitor: 0.1μF 3kV+.
  • Switch: Wolfspeed C3M0021120K SiC MOSFET (1200V).
  • Driver: Isolated gate driver (e.g., Si8271).
  • Dielectric Coupler: Ceramic capacitors (0.1μF 3kV) or PCB air-gap for grids.
  • Recovery Diode: Wolfspeed C4D20120D.
  • Buck: LM2596 (recovery to 3.6V).
  • Supercaps: Eaton 2 x 2.7V 10F series.
  • Microcontroller: UPduino v3.1.
  • Resistor: 100Ω.
  • Wires: HV silicone.
  • Load: 775 motor/12V bulb.
  • Tools: Multimeter, scope, soldering.

Safety

Handle HV; insulate; ventilate; disconnect during wiring.

Assembly

  1. Parallel batteries for 3.6V.
  2. Battery to booster in; adjust to 3kV out to cap +.
  3. Cap - to SiC MOSFET drain.
  4. MOSFET source to ground.
  5. MOSFET gate to driver out; driver in to UPduino pin 25.
  6. Power driver/UPduino from batteries.
  7. MOSFET drain to dielectric coupler input (e.g., ceramic cap +).
  8. Coupler output to load +.
  9. Load - to recovery diode anodes.
  10. Diode cathode to supercaps +.
  11. Supercaps - to ground.
  12. Supercaps + to buck in; adjust out to 3.6V to batteries.
  13. Common grounds.

Verilog Code

verilog

module pulse_gen (
   input clk,
   output reg pulse = 0
);
   reg [19:0] counter = 0;
   always @(posedge clk) begin
       counter <= counter + 1;
       if (counter == 119999) begin
           pulse <= 1;
           counter <= 0;
       end else if (counter == 1) begin
           pulse <= 0;
       end
   end
endmodule

Uploading Code

  1. Install OSS CAD Suite.
  2. Save as pulse_gen.v.
  3. Compile: yosys -p 'read_verilog pulse_gen.v; synth_ice40 -top pulse_gen -json pulse.json'; nextpnr-ice40 --up5k --package sg48 --json pulse.json --pcf upduino.pcf --asc pulse.asc.
  4. Bitstream: icepack pulse.asc pulse.bin.
  5. Zadig: libusbK driver.
  6. FT_PROG if EEPROM issues.
  7. Upload: iceprog pulse.bin.

Testing

Check 3kV cap; scope pulses; run load 35-71 min; thermal <60°C; submerged bulb.

Troubleshooting

No pulse: Check code/driver. Low output: Adjust booster. Overheat: Add heatsink to MOSFET.

GPE Schematics: How It Works And Build Instructions

How GPE Works

 

GPE uses PWM (100 Hz, 33% duty) from Arduino Nano to switch 36V boosted DC via IRL540N MOSFET and VOD3120AD gate driver, powering loads (e.g., 775 motor, 12V bulb) at ~12V average. Flyback diodes (1N4007) and STPS10H100CT capture spikes; supercaps store energy, buck converter (IPS-DTDYI48S1215) recycles 10-30% to battery, extending runtime 11-43%. Circuit requires isolation (separate main/iso grounds) to prevent interference, inspired by Edwin Gray's conversion tube in his prototypes and models, providing electrostatic isolation via spark-gap between HV input and LV output.

GPE Build Instructions

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